Wireless, handheld and other battery-powered mobile devices seem ubiquitous in the modern world. Much of the market success enjoyed by these electronic devices is attributable to, among other things, each device's functionality and degree of mobility. While battery-powered devices allow mobile users to operate in all environments and geographical locations, such products are prone to periodic recharging and replacement. In other words, batteries are capable of providing only limited operation time and suffer from a short lifespan. This is compounded by the number of diverse functions and operations that such products are expected to perform. For example, conventional mobile phones are expected to be capable of browsing the internet, capturing digital images, capturing and playing back video and audio recordings, decoding and playing audio files (e.g., audio files saved as MP3 or other MPEG files), etc. Each of these additional, non-traditional functions and operations degrade battery life. Therefore, systems that extend battery life in mobile devices are demanded by consumers.
Generally, the energy consumed by a circuit (e.g., an integrated circuit) is proportional to the product of the following variables: the switching capacitance of the circuit (“C”), the frequency of operation of the circuit (“f”), and the applied supply voltage (e.g., a power supply voltage) (“V”) squared. In other words, E α Cf(V^2). For any given circuit, it is further recognized that as the voltage applied to the circuit is increased, the maximum frequency of operation of the circuit is generally increased, and conversely the opposite is also true. Accordingly, a variety of techniques have been developed to take advantage of this principle and vary the power supply voltage level such that the minimum frequency of operation at that voltage level matches the desired frequency of operation. Although the relationship between voltage and frequency generally holds true, there are exceptions. For example, while it may be desirable to run a circuit at a maximum or predetermined frequency of operation (e.g., to ensure fast results), the frequency of operation of the circuit is generally limited not only by the voltage (e.g., the power supply voltage) applied, but is also generally limited by: the technology used to implement the circuit (e.g., CMOS technology), the skill of the designer, the temperature of the circuit (e.g., during operation thereof) and the process corner of the silicon used to fabricate the circuit (e.g., different process corners such as a fast or FF piece of silicon, a slow SS piece of silicon may affect circuit performance, etc.). In short, a circuit designer will typically design a circuit to operate at a guaranteed frequency under so-called “worst case” conditions of: slow silicon, low voltage and worst case (e.g., low or high) temperature. Such a circuit, however, will typically be capable of operating at much higher frequencies, or at the guaranteed frequency with a lower-than-typical voltage applied.
The conventional mechanism for providing a voltage (e.g., a power supply voltage) to a circuit requires at least two components: (1) a power regulator and (2) an energy controller. Conventionally, a power regulator may take the form of a power management integrated circuit (a “PMIC”) if the circuit is used as part of a mobile device, or may take the form of a voltage regulator module if the circuit is used as part of a non-mobile device (e.g., a traditional desktop computer). The power regulator is coupled to a power source such as a battery, and supplies the requested level of voltage to the circuit based on one or more control signals or other information from the energy controller. While power regulators are generally located “off” the circuit to which it is supplying the voltage, a power regulator may be configured to be located “on” the same circuit or packaged with the circuit. Generally, energy controllers are configured to request the voltage level (e.g., power supply voltage level) for the circuit and are thus often found on the same circuit for which it is requesting the voltage. In one embodiment, the energy controller is configured to be in communication with a processor or other functional logic block (e.g., a multimedia engine) on the circuit to determine or receive a target frequency value of operation of the processor or other functional block and indicative of a desired frequency for operation. Based on the target frequency value, the energy controller is able to request a suitable voltage from the power regulator. The voltage requested by and/or supplied to the energy controller is generally over-compensated to account for certain circuit variables described above and for other uncertainties such as but not limited to: known voltage tolerances of the voltage regulator, expected voltage losses associated with the printed circuit board (containing the circuit and/or other circuitry) and integrated circuit package(s), and the power delivery system on the circuit. The over-compensation amount is built in to account for these and other inefficiencies and uncertainties. In other words, circuit performance can generally be guaranteed by establishing an over-compensated power supply voltage for the circuit. It is recognized, however, that over-compensating a voltage may have an adverse effect on power consumption.
It is further known that different applications in a device (e.g., a mobile phone) may require different levels of performance from the circuit or chip. For example, the circuit in a mobile phone responsible for decoding MPEG audio may know that it has a predetermined amount of time, T1, to decode the audio stream and a different predetermined amount of time, T2, to perform a different task (e.g., capture and store video). Thus, a circuit designer has at least two options: (1) perform the operation as quickly as possible but in an amount of time less than what is allotted (e.g., less than T1, T2 or any other applicable time period) at a high voltage, and then attempt to use a clock gating technique to turn off the circuit until it is called for use again, or (2) perform the operation throughout the allotted time period but using a reduced amount of power by reducing a frequency of operation and by reducing the supplied voltage level to the level required to support that frequency of operation. It is recognized that the first approach is a bursty, “hurry up and wait” approach and is problematic to implement as a result of the difficulty generally associated with turning on and off circuits (or portions thereof) in response to certain tasks. For example, it is difficult to prevent passive power consumption as a result of current leakage and capacitance discharges. The second approach requires some predictor of circuit performance to determine the minimum frequency of operation and to select an appropriate matching voltage level so that the energy consumed can be reduced. This technique of varying frequency and voltage based on an application to reduce power is known as “dynamic frequency and voltage scaling”. A further enhanced technique involving monitoring in real time the frequency capability of the device and further minimizing voltage to the level required to just (i.e., barely) support the desired frequency of operation is referred to as “adaptive voltage scaling”. At least two prior art solutions are known that support this approach of monitoring and adjusting the voltage based on real-time circuit feedback.
The first adaptive voltage scaling prior art solution requires knowledge (whether by empirical analysis or extraction) of a critical path of the circuit or a portion of the circuit (e.g., one or more functional logic blocks). A critical path may be a predetermined electronic pathway previously identified as having an impact on the performance of a circuit or portion thereof. A critical path may be determined by simulating the operation of the components comprising the circuit or portion thereof and analyzing a timing report (e.g., during design testing) to identify one or more paths that have the potential (or do) degrade or adversely affect, the performance of the same (e.g., by limiting the frequency and thus efficiency of the circuit). It is usually assumed that, in an integrated circuit, the critical path is determined by the “longest” path (i.e., the path with the maximum signal transmission time). One approach to finding the critical path of a circuit requires an analysis or simulation of the circuit by the circuit designers, wherein it is established for each path whether or not it is longer than the previously-identified longest path. If the current path is shorter than the previously-identified longest path, it will no longer be taken into consideration. However, if the current path is longer, it is considered to be the critical path until, possibly, an even longer path is determined. It is recognized, however, that other approaches exist to determining a circuit's critical path.
Having identified a critical path, the first adaptive voltage scaling, prior art solution replicates the critical path using circuit components and supplies the circuit and the critical path with an initial power supply voltage having a voltage level that is known to ensure sufficient performance of a given task by the integrated circuit (e.g., by one or more functional logic blocks). By monitoring or measuring the frequency of operation of the critical path during operation of the circuit and comparing the measured frequency with an expected value (predetermined using empirical analysis), the first prior art solution is able to adjust the power supply voltage when the results of the comparison indicate that the measured frequency is greater than some function of the expected value, thus reducing the power consumption of the circuit. The first prior art solution, however, suffers from requiring a single, fixed critical path for all operating conditions of the circuit, even when empirical analysis may have determined that there are different critical paths for the circuit over different operating conditions. For example, it is recognized that a critical path may vary across processes, temperature conditions and may change across different voltage conditions. A circuit design whose speed at one voltage level is limited by a gate dominated path may be limited by a wire dominated path at a different voltage level. And, a circuit design limited by a standard threshold voltage transistor path at a first voltage may be limited by a high threshold voltage transistor path at a second voltage.
The second adaptive voltage scaling, prior art solution implements a fixed ring oscillator on the circuit supplied with the power supply voltage where the ring oscillator is configured such that the frequency of the ring oscillator is correlated to the resulting or actual frequency of the circuit. A ring oscillator may be implemented as a chain of functions containing an odd number of inverting functions whose output is fed back to its input and whose output switches with a frequency representative of the delay through the chain of devices. It is recognized that, in one embodiment, the frequency of the ring oscillator is the frequency in which the ring oscillator makes one revolution around the ring. The second prior art solution, like the first prior art solution, monitors the frequency of the ring oscillator with an expected value (also determined based on empirical analysis) and determines whether the voltage supply may be adjusted to conserve power consumption. The second solution, however, suffers to the extent that it is empirically difficult to correlate the monitored frequency levels of a ring oscillator with realized frequencies of the circuit. For example, while one would generally expect a circuit to run faster when the frequency of a representative ring oscillator is faster, empirical analysis shows that this is not always true over all operating conditions. In short, a fixed ring oscillator, like the fixed critical path replication above, is a poor indicator of circuit performance because fixed ring oscillators are not designed to track and adjust for the parameters (e.g., process, temperature, voltage, n-dominated circuitry, etc.) that affect critical paths and hence device performance.
Therefore a need exists to provide a more flexible solution for reducing power in an integrated circuit. Such a solution should compensate for the inefficiencies identified above with respect to fixed critical paths and fixed ring oscillators. Such a solution should also be adapted to stationary/non-mobile devices that would similarly benefit from power savings. Such a solution should also be adaptable to circuits that have multiple voltage islands (e.g., a system on a chip) with one or more power supply voltages.